The present disclosure relates to a semiconductor device. More particularly, the present disclosure relates to a semiconductor device including a field plate region and an auxiliary electrode formed in the field plate region.
A Metal Oxide Semiconductor Field Effect Transistor (MOSFET) may have relatively high input impedance compared to a bipolar transistor, providing a relatively large power gain and/or a relatively simple gate driving circuit. Further, the MOSFET may be a unipolar device having substantially no-time delay which may result from minority carrier storage and/or recombination while being turned off. The MOSFET may be applied to switching mode power supply devices, lamp ballasts, motor-driving circuits and the like. For example, a DMOSFET (Double Diffused MOSFET) manufactured by using a planar diffusion technology is generally used for each of these technologies.
A lateral double diffused metal oxide semiconductor (LDMOS) device may be applied to a VLSI process due to its relatively simple structure. Particularly, the LDMOS device may have relatively improved electrical characteristics compared to a vertical DMOS (VDMOS) device. For example, Korean Patent No. 10-1128694 discloses a LDMOS device including a field plate for reducing an electric field concentration at an edge portion of a gate electrode and improving a breakdown voltage, and Korean Laid-Open Patent Publication No. 10-2006-0077006 discloses a semiconductor device including a drift region for reducing a specific on-resistance (Rsp).
When the field plate is used, the breakdown voltage can be improved, but the channel length becomes relatively longer and thus the specific on-resistance may be increased. When the drift region is used, the specific on-resistance may be reduced by increasing the impurity concentration of the drift region. However, there is a limit to increase the impurity concentration of the drift region because the breakdown voltage can be lowered as a result to an extent that is unsuitable for some applications.